Turkmenistan standards PDF

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St JEDEC JESD8-35-2025

0.5V Low Voltage Swing Terminated Logic (LVSTL). Original standard JEDEC JESD8-35-2025 in PDF full version. Additional info + preview on request

Document status: Active

€35
St JEDEC JESD8-3A-2007

Gunning Transceiver Logic (GTL) Low-Level, High Speed Interface Standard for Digital Integrated Circuits. Original standard JEDEC JESD8-3A-2007 in PDF full version. Additional info + preview on request

Document status: Active

€35
St JEDEC JESD8-4-1993

Center-Tap-Terminated (CTT) Low-Level, High-Speed Interface Standard for Digital Integrated Circuits. Original standard JEDEC JESD8-4-1993 in PDF full version. Additional info + preview on request

Document status: Active

€35
St JEDEC JESD8-5A.01-2007

2.5 V ± 0.2 V (Normal Range) and 1.8 V – 2.7 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits. Original standard JEDEC JESD8-5A.01-2007 in PDF full version. Additional info + preview on request

Document status: Active

€35
St JEDEC JESD8-7A-2006

1.8 V ± 0.15 V (Normal Range) and 1.2 V - 1.95 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits. Original standard JEDEC JESD8-7A-2006 in PDF full version. Additional info + preview on request

Document status: Active

€35
St JEDEC JESD8-9B-2002

Stub Series Terminated Logic for 2.5 V (SSTL_2). Original document JEDEC JESD8-9B-2002 in PDF. Additional info + preview on request

Document status: Active

€35
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